digital time delay filter
英 [ˈdɪdʒɪtl taɪm dɪˈleɪ ˈfɪltə(r)]
美 [ˈdɪdʒɪtl taɪm dɪˈleɪ ˈfɪltər]
网络 数字时间延迟滤波器
双语例句
- The realization method of a infinite impulse response ( IIR) digital filter based on FPGA is introduced. This paper proposes four blocks of IIR, which are clock control, time delay, multiply and addition, implemented IIR filter with VHDL and FPGA device.
本文介绍了IIR滤波器的FPGA实现方法，给出了IIR数字滤波器的时序控制、延时、补码乘法和累加四个模块的设计方法，并用VHDL和FPGA器件实现了IIR数字滤波。